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Highly Integrated Chips: Super-Brains for the IoT Age

Author / Editor: Katrin Tina Möbius * / Dipl.-Medienwirt (FH) Matthias Back

Electronic devices are becoming continually smaller, more flat and multifunctional and their “inner life”, the microelectronic systems, along with them – thanks to 3D integration.

Fig. 1: Tire pressure sensor (Infineon, Sensonor, SINTEF), fabricated with the patented 3D technology from Fraunhofer EMFT.
Fig. 1: Tire pressure sensor (Infineon, Sensonor, SINTEF), fabricated with the patented 3D technology from Fraunhofer EMFT.
(Bild: Fraunhofer EMFT)

Further miniaturization of electronic devices would not be possible without key technologies like 3D integration. The ability to interconnect heterogeneous components into one single microelectronic system is becoming even more crucial now: It enables highly integrated, smart sensor systems needed e.g. for the Internet of things.

Many of today’s chips show such complex functionalities that they could also be considered as mini-computers: ultra-miniaturized electronic “brains” – following the big European research project “e-Brains” ( which are also equipped with sensors, the “sense organs” of things. This is enabled by technologies like high-performant 3D integration, where heteroge­neous microelectronic components are stacked on top of one another and connected by electrical through-via-wiring into a highly integrated microelectronic system.


As Peter Ramm and his team from the Fraunhofer Research Institution for Microsystems and Solid State Technologies EMFT started their research activities on 3D integration of microelectronic systems 30 years ago, they were considered as exotics. Meanwhile, this has changed dramatically: 3D integration is established as a key technology to make microelectronic systems smaller, at the same time increasing their performance. The principle of 3D integration can be described very simply: The, in many cases heterogeneous, components of a chip are stacked on top of one another and vertically connected by electrical through via wiring to a single circuit (IC).

Evolutionary Process Since the 80's

From its beginning in the 80´s until today the technology has gone through a big evolutionary process. Basically four different bonding technologies have been established since then – Peter Ramm’s Munich team – especially Armin Klumpp and Josef Weber – conducting pioneer work in the field of 3D integration and deploying all of them.

In the beginning of the 90´s, the Fraunhofer researchers started to use the so-called dielectric bonding. Thereby the wafers are mechanically connected through an oxide layer. The vertical electric through-via-wirings (Through Silicon Vias, TSV) are implemented in a further step. The problem with this method are the comparatively high bonding temperatures, which have a negative impact on lifetime and reliability of the device. “Ideally the bonding temperature should not be much higher than the temperatures the device will be exposed to when it is in use”, Peter Ramm says. One alternative is the method of adhesive bonding, where the substrates are connected with the help of an adhesive. Although this method requires only relatively low temperatures, it has disadvantages as well: The TSVs have to be etched through the complete stacked assembly, including the adhesion layer, and filled with a metallic compound – a complex and expensive procedure.

A real “milestone” was set with the development and application of metal bonding: This method uses the fact that some metal systems like copper-copper or copper-tin are very suitable to connect wafers in a robust and high-quality way. “But the real key feature is that the components can be connected mechanically as well as electrically in one step. This allows for a very simple 3D integration of the chips, using cost-efficient wafer processes”, says Peter Ramm.

Thus, the time-consuming and costly procedure of through-contacting the wafer stacks is no longer required. Based on the metal bonding method, Fraunhofer EMFT researchers developed the so-called SLID-bonding (solid-liquid interdiffusion) in cooperation with colleagues from Infineon. In this technology a low-melting solder layer between two high-melting metals is heated up above its melting point, causing the atoms of the higher melting metal layer, which is still solid at the bonding temperature (e.g. copper), to diffuse into the liquid metal (e.g. tin) and both layers to connect to an intermetallic compound (e.g. Cu3Sn). The melting point of this compound is at much higher temperatures than the bonding temperature. This guarantees a high mechanical stability of the systems.

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